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PANDA: An LLM-Enhanced Framework That Cuts Analog Design Time from Days to Hours

A new LLM-enhanced framework called PANDA bridges high-level design intent to final layout for analog circuits, reducing turnaround time from days or weeks to hours while improving design performance. The framework manages cross-stage dependencies through guided topology synthesis, substructure-aware sizing, and constraint-driven layout generation.

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iGEN Editorial
June 16, 2026
PANDA: An LLM-Enhanced Framework That Cuts Analog Design Time from Days to Hours

According to a preprint on arXiv, researchers have developed PANDA, an LLM-enhanced analog design framework that dramatically reduces the time required to go from design intent to final layout. Traditional analog circuit design relies heavily on manual interventions across topology, sizing, and layout stages, with prior automation approaches addressing each stage in isolation. PANDA bridges this gap by actively managing cross-stage dependencies.

"PANDA shifts automation from algorithm-centric execution to intent-centric co-design, reducing turnaround time from days or weeks to hours while improving design performance." (from the abstract)

The Challenge of Analog Design Automation

The paper notes that traditional analog circuit design is heavily reliant on manual interventions. Prior automation efforts have addressed topology, sizing, and layout separately, but no single framework integrated them end-to-end. This siloed approach leads to long design cycles and suboptimal results.

How PANDA Works

PANDA is an LLM-enhanced framework that interprets high-level design intent and guides the entire design flow. It manages cross-stage dependencies through three key components:

  • Guided topology synthesis: Uses LLM capabilities to generate circuit topologies aligned with design goals.
  • Substructure-aware sizing: Optimizes component sizes while considering the impact on overall circuit performance.
  • Constraint-driven layout generation: Produces layouts that satisfy physical and electrical constraints.

By integrating these stages, PANDA shifts the design paradigm from algorithm-centric execution to intent-centric co-design, where the designer's high-level goals drive the automation.

Measured Performance Gains

The authors report that PANDA reduces turnaround time from days or weeks to hours while improving design performance. The following table summarizes the reported outcomes:

Metric Traditional Approach PANDA Framework
Turnaround time Days to weeks Hours
Design performance Baseline Improved

While specific performance metrics are not detailed in the source, the improvement is noted as significant enough to merit a shift in design workflows.

Implications for Enterprise Hardware Development

For technology leaders overseeing hardware development, PANDA represents a step forward in design automation. By cutting design cycles from weeks to hours, it can accelerate time-to-market for analog integrated circuits used in applications ranging from automotive to telecommunications. The LLM-enhanced approach also suggests a broader trend toward integrating large language models into electronic design automation (EDA) tools, potentially transforming how engineers interact with design software.

The framework was described in a preprint on arXiv by authors Zhang, Haoyi; Fan, Weijian; Gao, Xiaohan; Liu, Bingyang; Wang, Runsheng; and Lin, Yibo. As an academic preprint, the work has not yet undergone peer review, but it indicates active research in applying LLMs to hardware design challenges.

Sources:

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