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IBM's NanoStack chip packs 100 billion transistors in sub-1nm breakthrough for enterprise AI and data centres

IBM has announced a new chip architecture called NanoStack that crams 100 billion transistors onto a fingernail-sized surface at roughly 0.7nm, the first known sub-1nm design. In tests, the prototype delivered 50% better performance and 70% energy efficiency versus IBM's 2nm chip. The technology, still years from production, relies on stacking transistor sheets vertically to extend Moore's Law.